No host-readable PSP memory aperture exists on SMN — and broad SMN sweeps are NOT safe

The question

Finding a flash aperture on DF (FINDING-DF-FLASH-APERTURE-HOST-READABLE.md) raised an obvious follow-up: if DF exposes memory apertures, does any of them map PSP SRAM or the TMR? That would be a direct host read window into PSP memory — the disclosure primitive this project has never had, and the thing blocking every escalation path (no canary leak).

The test was decisive

We hold the actual PSP module images on disk, so the check is exact rather than heuristic: sweep SMN for decoding apertures and see whether any returns bytes matching sos_code.bin, sys_drv_code.bin, asd_code.bin, hdcp_code.bin, dtm_code.bin, or ras_code.bin.

Swept 0x00000000 .. 0x20000000 at 0x100000 granularity, filtering out dead (0/0xFFFFFFFF) and mirror (value == byteswap(addr)) reads.

Result: NO

Every live base is accounted for, and none is PSP memory:

flash aperture mirrors, repeating every 0x200000 across 0xd100000 .. 0xe000000, alternating aa55aa55... (flash 0x0) and 24505350 ($PSP) (flash 0x20000)
0xc000000 .. 0xc500000 — one repeated non-flash pattern
0x1300000, 0x10100000, 0x1a300000, 0x1f000000 — small, unidentified
zero matches against any PSP module image, and nothing Thumb-code-like

So the PSP's SRAM is not mapped into SMN. The disclosure primitive is still missing, and this closes the most promising route to it.

I wedged the card doing this — SMN sweeps are not free

Immediately after the sweep the SMU stopped answering (SMU msg 0x1a timeout during set_clocks at exit), and the next device init failed at PSP LOAD_IP_FW with status 0x80000806. A PCIe link reset was not tried; a cold ATX power cycle restored everything (MEMSIZE=0x5ff0, sos_alive=True, matmul correct).

I had been treating SMN reads as harmless because individual targeted reads always were. At breadth they are not. Sweeping 512 bases across a 512 MB span touched something that left MP1/MP0 in a bad state.

Rule going forward: do not blind-sweep SMN. Probe addresses that come from the discovery table or from firmware, in small batches, with a health check (is_sos_alive + SMU TestMessage) after each batch, and stop on the first anomaly. regguard validates interpretation; it says nothing about whether the access itself is safe.

Artifacts

hunt_psp_memory_aperture.py, dce_survey.py, flash_live_diff.py.

Side results

DCE is power-gated. Only base 0x34c0 decodes; the rest read 0 because nothing ever brought the display block out of reset. Using it would require implementing display init — large effort, uncertain payoff. Parked.
Live flash == archive. Sampling 224 points across flash[0x20000,0x100000) plus flash[0,0x20000) found zero differences from flash_BIOS2_KNOWNGOOD_20260917.bin, so there is no runtime-mutable region (no anti-rollback counter / NVRAM) in the aperture's range.