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<title>amd-psp-re.git/smu, branch main</title>
<subtitle>AMD PSP reverse engineering, emulator and vulnerability research</subtitle>
<id>https://git.sl0p.foo/amd-psp-re.git/atom/smu?h=main</id>
<link rel='self' href='https://git.sl0p.foo/amd-psp-re.git/atom/smu?h=main'/>
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<updated>2026-09-28T13:47:22Z</updated>
<entry>
<title>Probe the SMU host message ABI on silicon; all index args are bounded</title>
<updated>2026-09-28T13:47:22Z</updated>
<author>
<name>user</name>
<email>user@clank</email>
</author>
<published>2026-09-28T13:47:22Z</published>
<link rel='alternate' type='text/html' href='https://git.sl0p.foo/amd-psp-re.git/commit/?id=cb6f03125e019955912baa45faa9359da1d810db'/>
<id>urn:sha1:cb6f03125e019955912baa45faa9359da1d810db</id>
<content type='text'>
SMU is the other big host-facing microcontroller, and several PPSMC_MSG_*
arguments are indices -- the shape that produced DMCUB FINDING-2. Probed
directly on the card, read-direction only.

TransferTableSmu2Dram rejects every table_id &gt;= TABLE_COUNT (positive control:
six in-range ids returned data into the driver DRAM buffer). GetDpmFreqByIndex
bounds both the clock id and the level. GetVoltageByDpm is a deterministic
quadratic curve evaluation, not an indexed load.

Two near-misses are recorded rather than banked: GetDpmFreqByIndex accepting
0x100/0xffff is 8-bit masking aliasing, and GetVoltageByDpm's alarming
0xffff -&gt; 0x1e3f2a is arithmetic. TransferTableDram2Smu was deliberately not
probed; an out-of-range id in the write direction risks wedging the SMU.
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</entry>
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