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| author | user <user@clank> | 2026-07-18 22:06:35 +0200 |
|---|---|---|
| committer | user <user@clank> | 2026-07-18 22:06:35 +0200 |
| commit | 4425150cb6f52d15f513690a75645639358a2030 (patch) | |
| tree | b186e048c286f7fb9b78552fb10ebf417ac5178c /src/boot.asm | |
| parent | term: latch SCY in VBlank - fix ring-scroll shear on live displays (diff) | |
| download | gbos-4425150cb6f52d15f513690a75645639358a2030.tar.gz gbos-4425150cb6f52d15f513690a75645639358a2030.tar.xz gbos-4425150cb6f52d15f513690a75645639358a2030.zip | |
kernel: CGB double-speed mode - 2x everything (1.99x measured)
KEY1 prepare + STOP at KernelInit (skipped on warm reboot if already
fast). The PPU/LCD keep their normal rate; the timer and DIV double
with the CPU, compensated at the two consumers:
- TimerISR now fires at 128 Hz; a toggle byte keeps wTicks at 64 Hz
(uptime semantics unchanged)
- sys_sleep halves the DIV-delta accumulator's high byte (256 DIV
ticks = 1/128 s in double speed) so gsleep/msleep stay real-time
Measured: count 60 (scroll-heavy) 3.77s -> 1.89s wall; wTicks 64 Hz
over 4s; ping's 800ms msleep pacing unchanged (2.77s for 4 echoes).
sl0pboy already emulated KEY1/STOP + per-speed timer/PPU rates.
Diffstat (limited to '')
| -rw-r--r-- | src/boot.asm | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/boot.asm b/src/boot.asm index 88eb240..f649008 100644 --- a/src/boot.asm +++ b/src/boot.asm @@ -44,6 +44,20 @@ KernelInit: push af ; boot ROM hands the console model in A/B - push bc ; park it on the (uncleared) stack for dmesg + ; CGB double-speed mode: 8.4 MHz for the whole kernel + userland. The + ; PPU/LCD keep their normal rate; the timer and DIV double with the CPU, + ; which TimerISR (128 Hz -> 64 Hz toggle) and sys_sleep (DIV halving) + ; compensate for. P1 select lines off first, per the hardware procedure. + ldh a, [$FF4D] ; KEY1 + bit 7, a ; already fast? (warm reboot) + jr nz, .fast + ld a, $30 + ldh [$FF00], a ; P1: no select lines (STOP quirk guard) + ld a, 1 + ldh [$FF4D], a ; KEY1.0 = prepare speed switch + stop ; switch: continues in double speed +.fast + ; enable cart RAM (MBC5) ld a, $0A ld [MBC5_RAM_ENABLE], a |