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Diffstat (limited to '')
| -rw-r--r-- | src/sched.asm | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/src/sched.asm b/src/sched.asm index a540c49..0369ff4 100644 --- a/src/sched.asm +++ b/src/sched.asm @@ -67,9 +67,28 @@ FindNextReady:: ret ; ----------------------------------------------------------------------------- -; TimerISR - preemption hook (TODO). A real preemptive switch must save the -; interrupted context and call hSwitchTo from here. For now the demo is -; cooperative (tasks call SYS_YIELD), so we just acknowledge and return. +; TimerISR - the system tick. TAC runs the timer at 16384 Hz with TMA=0, so +; TIMA overflows (and this fires) at 64 Hz: wTicks is a monotonic 32-bit +; 1/64-second counter (SYS_UPTIME reads it; wraps after ~2.1 years). +; Scheduling stays cooperative - this ISR is deliberately transparent (all +; registers preserved, fixed-WRAM only), so it can interrupt anything, +; including kernel code mid-syscall. Preemption would hook in here later. ; ----------------------------------------------------------------------------- TimerISR:: + push af + push hl + ld hl, wTicks + inc [hl] + jr nz, .done ; no carry out of byte 0 + inc hl + inc [hl] + jr nz, .done + inc hl + inc [hl] + jr nz, .done + inc hl + inc [hl] +.done + pop hl + pop af reti |