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-rw-r--r--src/sched.asm12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/sched.asm b/src/sched.asm
index 0369ff4..b4b5a30 100644
--- a/src/sched.asm
+++ b/src/sched.asm
@@ -67,9 +67,10 @@ FindNextReady::
ret
; -----------------------------------------------------------------------------
-; TimerISR - the system tick. TAC runs the timer at 16384 Hz with TMA=0, so
-; TIMA overflows (and this fires) at 64 Hz: wTicks is a monotonic 32-bit
-; 1/64-second counter (SYS_UPTIME reads it; wraps after ~2.1 years).
+; TimerISR - the system tick. TAC runs the timer at 16384 Hz with TMA=0 -
+; but the CPU is in DOUBLE-SPEED mode, so the input clock is really 32768 Hz
+; and this fires at 128 Hz. A toggle halves that back down: wTicks stays a
+; monotonic 32-bit 1/64-second counter (SYS_UPTIME reads it; wraps ~2.1 yr).
; Scheduling stays cooperative - this ISR is deliberately transparent (all
; registers preserved, fixed-WRAM only), so it can interrupt anything,
; including kernel code mid-syscall. Preemption would hook in here later.
@@ -77,6 +78,11 @@ FindNextReady::
TimerISR::
push af
push hl
+ ld hl, wTickTog
+ ld a, [hl]
+ xor 1
+ ld [hl], a
+ jr nz, .done ; first IRQ of the 128 Hz pair: count nothing
ld hl, wTicks
inc [hl]
jr nz, .done ; no carry out of byte 0