From 4425150cb6f52d15f513690a75645639358a2030 Mon Sep 17 00:00:00 2001
From: user <user@clank>
Date: Sat, 18 Jul 2026 22:06:35 +0200
Subject: kernel: CGB double-speed mode - 2x everything (1.99x measured)

KEY1 prepare + STOP at KernelInit (skipped on warm reboot if already
fast). The PPU/LCD keep their normal rate; the timer and DIV double
with the CPU, compensated at the two consumers:
- TimerISR now fires at 128 Hz; a toggle byte keeps wTicks at 64 Hz
  (uptime semantics unchanged)
- sys_sleep halves the DIV-delta accumulator's high byte (256 DIV
  ticks = 1/128 s in double speed) so gsleep/msleep stay real-time

Measured: count 60 (scroll-heavy) 3.77s -> 1.89s wall; wTicks 64 Hz
over 4s; ping's 800ms msleep pacing unchanged (2.77s for 4 echoes).
sl0pboy already emulated KEY1/STOP + per-speed timer/PPU rates.
---
 src/kdata.asm | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/kdata.asm')

diff --git a/src/kdata.asm b/src/kdata.asm
index b0cd71b..13dc6dd 100644
--- a/src/kdata.asm
+++ b/src/kdata.asm
@@ -66,3 +66,5 @@ wBootA::     DS 1       ; A at entry: console model from the boot ROM
 wBootB::     DS 1       ; B at entry: bit0 set = AGB (GBA in CGB mode)
 wBootFsFresh::DS 1      ; fs_init formatted a blank disk this boot
 wTicks::     DS 4       ; monotonic 64 Hz system tick (TimerISR), LE
+wTickTog::   DS 1       ; TimerISR fires at 128 Hz in double-speed mode;
+                        ; this toggle keeps wTicks counting at 64 Hz
-- 
cgit v1.3.1-sl0p