From 0cc9b0a8bdf774ee376937d5a6767ccdced51245 Mon Sep 17 00:00:00 2001 From: user Date: Sat, 18 Jul 2026 10:10:04 +0200 Subject: kernel: a real timer source (64 Hz tick IRQ) + uptime(1) The kernel had no clock: TimerISR was a reti stub, IEF_TIMER masked, and IME was never enabled - the vectors were decorative. sys_sleep just polls DIV deltas per-process; nothing counted globally. Now: TAC runs the hardware timer at 16384 Hz with TMA=0, so TIMA overflows at exactly 64 Hz; TimerISR increments a monotonic 32-bit wTicks (wraps after ~2.1 years). Scheduling stays cooperative - the ISR is transparent. Enabling IME in a kernel written for zero interrupts needs care wherever SP points into memory whose bank is being switched (an IRQ pushes onto SP): - read_block/write_block map the disk bank over the $A000 window that holds the caller's stack -> di/ei around the transfer (~2ms, well under the 15.6ms tick period, so no tick is ever lost) - hSwitchTo switches SVBK + cart-RAM banks under the outgoing stack -> di on entry, ei once the incoming stack is mapped - fork already runs on KSTACK_TOP2 (fixed WRAM) - safe as-is - term_putc's SVBK switch only remaps $Dxxx, stacks live in $Axxx/$Cxxx SYS_UPTIME (36) copies the counter (4B LE, di/ei so the read can't tear) to a user buffer; libc gticks(); usr/uptime.c formats 'up [Nd] H:MM:SS'. uptime avoids SDCC long div/shift entirely: sm83.lib modules link into their own areas that land in the $A000 RAM window (latent build.sh trap, documented there) - bytewise >>6 plus bounded subtraction loops instead. --- src/blk.asm | 5 +++++ src/boot.asm | 14 +++++++++++--- src/hram.asm | 5 +++++ src/kdata.asm | 1 + src/programs.asm | 7 +++++++ src/sched.asm | 25 ++++++++++++++++++++++--- src/syscall.asm | 19 +++++++++++++++++++ 7 files changed, 70 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/blk.asm b/src/blk.asm index 2be961e..76561da 100644 --- a/src/blk.asm +++ b/src/blk.asm @@ -34,6 +34,8 @@ ENDM ; ----------------------------------------------------------------------------- read_block:: ld c, a + di ; the tick ISR pushes on SP, which points into + ; the $A000 window we are about to remap srl a srl a srl a @@ -54,6 +56,7 @@ read_block:: dec b jr nz, .cp restore_bank ; inline - no stack while the disk bank is mapped + ei ret ; ----------------------------------------------------------------------------- @@ -61,6 +64,7 @@ read_block:: ; ----------------------------------------------------------------------------- write_block:: ld c, a + di ; see read_block srl a srl a srl a @@ -81,6 +85,7 @@ write_block:: dec b jr nz, .cp restore_bank + ei ret ; ============================================================================= diff --git a/src/boot.asm b/src/boot.asm index c2d461a..4049f9d 100644 --- a/src/boot.asm +++ b/src/boot.asm @@ -81,11 +81,19 @@ KernelInit: call SchedInit ; pick first task, set wCurProc - ; interrupts: enable timer for preemption + ; system tick: hardware timer at 16384 Hz input, TMA=0 -> TIMA overflow + ; IRQ at 64 Hz. TimerISR just counts (wTicks); scheduling stays + ; cooperative. Only the timer bit is enabled in IE. + xor a + ld [rTIMA], a + ld [rTMA], a + ld a, %00000111 ; enable | 16384 Hz + ld [rTAC], a xor a ld [rIF], a - ; ld a, IEF_TIMER ; (timer bit) - leave masked for cooperative demo - ; ld [rIE], a + ld a, IEF_TIMER + ld [rIE], a + ei ; hand control to the first task via a context switch-in jp SchedRunFirst diff --git a/src/hram.asm b/src/hram.asm index 7c1910c..9e65982 100644 --- a/src/hram.asm +++ b/src/hram.asm @@ -31,6 +31,9 @@ LOAD "hram_code", HRAM ; Runs from HRAM. Saves/restores full context. Clobbers everything. ; --------------------------------------------------------------------------- hSwitchTo:: + di ; no tick ISR while SP and the banks under it + ; are out of sync (pushes would hit the wrong + ; bank); ei below once the incoming stack is up ; stash target while DE is still valid ld a, e ld [hSwitchTgt], a @@ -114,6 +117,8 @@ hSwitchTo:: ld sp, hl ; --- pop incoming context and resume it --- + ei ; SP + banks consistent again (takes effect + ; after the next instruction) pop hl pop de pop bc diff --git a/src/kdata.asm b/src/kdata.asm index 65a059a..b0cd71b 100644 --- a/src/kdata.asm +++ b/src/kdata.asm @@ -65,3 +65,4 @@ wPnStart:: DS 2 ; scratch for sys_progname wBootA:: DS 1 ; A at entry: console model from the boot ROM wBootB:: DS 1 ; B at entry: bit0 set = AGB (GBA in CGB mode) wBootFsFresh::DS 1 ; fs_init formatted a blank disk this boot +wTicks:: DS 4 ; monotonic 64 Hz system tick (TimerISR), LE diff --git a/src/programs.asm b/src/programs.asm index 6dbc584..7c17fb5 100644 --- a/src/programs.asm +++ b/src/programs.asm @@ -133,6 +133,9 @@ ProgDhcp: SECTION "prog_irc", ROMX[$4000], BANK[32] ProgIrc: INCBIN "build/usr/irc.bin" +SECTION "prog_uptime", ROMX[$4000], BANK[33] +ProgUptime: + INCBIN "build/usr/uptime.bin" ; ----------------------------------------------------------------------------- ; PROG_SH (bank 3) - the shell, now written in C (usr/sh.c): parses >/