From 2c2124aff2f4ed6df23512603b6e1ecdcd4b699b Mon Sep 17 00:00:00 2001 From: blasty Date: Sun, 26 Jul 2026 15:04:51 +0200 Subject: arm: offer 32-bit ARM at load, and fix `p` on carved code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reported as "after c a few times and p at the entry point, Tab just flashes and nothing decompiles". Three separate things, found by following it down: **1. `p` failed on hand-carved code.** ida_funcs.add_func(ea) asks IDA to find the function's end and on carved code it often can't — a run ending in a tail call, or whose last instruction isn't recognised as a return, fails with no reason given. add_func(ea, end) with an explicit end succeeds. define_func_run tries IDA's way first, then falls back to the end of the contiguous instruction run, and says which it used. **2. The database was 64-bit, so Hex-Rays refused it regardless.** Bare `-parm` gives an AArch64 database. Ask Hex-Rays for the failure object rather than reading None as "dunno" and it says exactly what's wrong: "only 64-bit functions can be decompiled in the current database". So the disassembly looked right and F5 could never work. That is decided at LOAD and cannot be corrected — inf_set_app_bitness(32) afterwards makes the decompiler INTERR 50735. The fix is at the load dialog: arm:ARMv7-A (most firmware), arm:ARMv7-M / arm:ARMv6-M (Cortex-M, Thumb only) and arm:ARMv5TE now sit alongside 64-bit `arm`, labelled with their bitness. With arm:ARMv7-A, experiments/fibonacci.bin decompiles: void __fastcall __noreturn sub_0(int a1) { int v2; v2 = sub_E3C(a1, 0); ... } — and IDA's own auto-analysis finds 54 Thumb functions on load, versus none as plain `arm`. **3. `t` was silently building an undecompilable state.** It forced the SEGMENT to 32-bit in a 64-bit database, which produces correct-looking disassembly that F5 will never touch. It now says so and names the fix (Ctrl+L, arm:ARMv7-A) rather than leaving you to discover it. tools/verify_procs.py now reports each processor's resulting bitness, since that is the reason the variants exist — and it compares against the base module name, because a variant reports "ARM". tests: test_thumb_ui.py +5 (13 total) — a 64-bit database warns and names the fix, a 32-bit one finds functions by itself, Tab decompiles a Thumb function and the result reads like C. test_formats.py +2 (34) pinning that a 32-bit variant is offered and the ARM labels state their bitness. 209/0 scenarios, 26/0 blob, 30/0 project UI. --- docs/PROJECTS.md | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'docs/PROJECTS.md') diff --git a/docs/PROJECTS.md b/docs/PROJECTS.md index 38d3262..eae860b 100644 --- a/docs/PROJECTS.md +++ b/docs/PROJECTS.md @@ -317,6 +317,24 @@ ARM32. `t` again toggles back — the mode is a guess, and guesses get revised. Both states are saved in the `.i64`. +**Pick a 32-bit processor at load, or none of this decompiles.** Bare `arm` +gives a 64-BIT database (AArch64), and that is decided at load time and cannot be +changed afterwards — setting the bitness post-hoc makes the decompiler INTERR. +In a 64-bit database: + +* Thumb doesn't exist, so `t` sets a segment flag that means nothing; and +* Hex-Rays refuses a 32-bit function outright — *"only 64-bit functions can be + decompiled in the current database"* — so the disassembly looks right and F5 + silently produces nothing. + +So the list offers `arm:ARMv7-A` (most firmware), `arm:ARMv7-M` / `arm:ARMv6-M` +(Cortex-M, Thumb only) and `arm:ARMv5TE` alongside 64-bit `arm`. `t` warns when +it notices the database is 64-bit and points at `Ctrl+L`. + +Worth knowing: a correctly-chosen 32-bit ARM database also lets IDA's own +auto-analysis find Thumb functions — `experiments/fibonacci.bin` yields 54 +functions on load with `arm:ARMv7-A` and none with `arm`. + ### When analysis finds nothing Zero functions is what a raw image described wrongly looks like — right file, -- cgit v1.3.1-sl0p