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authoruser <user@clank>2026-07-18 21:42:27 +0200
committeruser <user@clank>2026-07-18 21:42:27 +0200
commit554fd415d34235fda6c172fc09b19278764f00c3 (patch)
treec97cfaa03a281d61d39820fbddbb3eef0705bcce /src/blk.asm
parentterm: cache tile attrs in COL_BUF's spare stride bytes (3.5x scroll) (diff)
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term: 3 more renderer wins - 10.9x scroll, 2.7x putc vs pre-cache
1. color_setup memoization: a call with the same (colL,colR) pair as last time returns immediately (masks/attr still valid in WRAM). Runs of same-colored cells - i.e. almost all text - hit this. 2. build_tile blank fast path: two spaces = bg-only planes, 8 constant rows; term_scroll's cleared line and every blank region skip the glyph pipeline entirely. 3. build_tile two-phase rewrite: combine both glyphs into wRowBuf with pointers in registers (the old per-row 16-bit WRAM pointer walk was most of the blit), then compose planes unrolled with plane-0 masks in B/C. 4. term_write_tilemap attr pass: split each row at the pos-256 VRAM bank boundary into two tight cache->tilemap copy runs - no per-tile addressing or bank test. Measured (emulator cycle counter, ANSI test screen): term_scroll 857k -> 248k (attr cache) -> 78.5k T-cycles term_write_tilemap 723k -> 114k -> 45.4k term_putc 18.2k -> 6.7k A scroll is now ~1.1 frames of guest CPU (was 12); a full 40-char line prints in ~63ms of guest time (was ~173ms).
Diffstat (limited to 'src/blk.asm')
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