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-rw-r--r--src/boot.asm21
1 files changed, 18 insertions, 3 deletions
diff --git a/src/boot.asm b/src/boot.asm
index 4049f9d..88eb240 100644
--- a/src/boot.asm
+++ b/src/boot.asm
@@ -15,7 +15,7 @@ SECTION "rst30_syscall", ROM0[$30]
; Interrupt vectors
; -----------------------------------------------------------------------------
SECTION "vblank", ROM0[$40]
- reti
+ jp VBlankISR ; applies the latched SCY (see hram.asm hSCY)
SECTION "stat", ROM0[$48]
reti
SECTION "timer", ROM0[$50]
@@ -83,7 +83,8 @@ KernelInit:
; system tick: hardware timer at 16384 Hz input, TMA=0 -> TIMA overflow
; IRQ at 64 Hz. TimerISR just counts (wTicks); scheduling stays
- ; cooperative. Only the timer bit is enabled in IE.
+ ; cooperative. VBlank is enabled too, but its ISR is equally
+ ; transparent: it only applies the latched SCY (terminal ring-scroll).
xor a
ld [rTIMA], a
ld [rTMA], a
@@ -91,7 +92,7 @@ KernelInit:
ld [rTAC], a
xor a
ld [rIF], a
- ld a, IEF_TIMER
+ ld a, IEF_TIMER | IEF_VBLANK
ld [rIE], a
ei
@@ -113,3 +114,17 @@ ClearKernelRAM:
or c
jr nz, .loop
ret
+
+; -----------------------------------------------------------------------------
+; VBlankISR - transparent, like TimerISR: applies the latched SCY so terminal
+; ring-scrolls land at frame boundaries. SCY is sampled per scanline, so a
+; mid-frame write shears the picture (top at the old offset, bottom at the
+; new) - exactly the sixel-view glitch this ISR exists to prevent.
+; -----------------------------------------------------------------------------
+SECTION "vblank_isr", ROM0
+VBlankISR:
+ push af
+ ldh a, [hSCY]
+ ldh [$FF42], a ; rSCY
+ pop af
+ reti