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| author | SatoMew <SatoMew@users.noreply.github.com> | 2024-06-27 02:19:06 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-26 21:19:06 -0500 |
| commit | 57bec62508c6ae3424977c9db55ad66fc1eb0a42 (patch) | |
| tree | e7b3b81c68c901a6b2b1811c8a6e1c57b479dd44 /home | |
| parent | Merge branch 'master' of https://github.com/pret/pokered (diff) | |
| download | pokeyellow-57bec62508c6ae3424977c9db55ad66fc1eb0a42.tar.gz pokeyellow-57bec62508c6ae3424977c9db55ad66fc1eb0a42.tar.xz pokeyellow-57bec62508c6ae3424977c9db55ad66fc1eb0a42.zip | |
Improve documentation of some SRAM routines (#114)
Diffstat (limited to 'home')
| -rw-r--r-- | home/bankswitch2.asm | 8 | ||||
| -rw-r--r-- | home/pics.asm | 8 | ||||
| -rw-r--r-- | home/uncompress.asm | 4 |
3 files changed, 10 insertions, 10 deletions
diff --git a/home/bankswitch2.asm b/home/bankswitch2.asm index cc7169cd..cc54a8cb 100644 --- a/home/bankswitch2.asm +++ b/home/bankswitch2.asm @@ -20,9 +20,9 @@ Bankswitch:: JumpToAddress:: jp hl -SwitchSRAMBankAndLatchClockData:: +OpenSRAM:: push af - ld a, $1 + ld a, SRAM_BANKING_MODE ld [MBC1SRamBankingMode], a ld a, SRAM_ENABLE ld [MBC1SRamEnable], a @@ -30,9 +30,9 @@ SwitchSRAMBankAndLatchClockData:: ld [MBC1SRamBank], a ret -PrepareRTCDataAndDisableSRAM:: +CloseSRAM:: push af - ld a, $0 + ld a, SRAM_DISABLE ld [MBC1SRamBankingMode], a ld [MBC1SRamEnable], a pop af diff --git a/home/pics.asm b/home/pics.asm index c0559908..d02cf1b5 100644 --- a/home/pics.asm +++ b/home/pics.asm @@ -89,7 +89,7 @@ LoadUncompressedSpriteData:: add a ; 8*(7*((8-w)/2) + 7-h) ; combined overall offset (in bytes) ldh [hSpriteOffset], a ld a, $0 - call SwitchSRAMBankAndLatchClockData + call OpenSRAM ld hl, sSpriteBuffer0 call ZeroSpriteBuffer ; zero buffer 0 ld de, sSpriteBuffer1 @@ -100,7 +100,7 @@ LoadUncompressedSpriteData:: ld de, sSpriteBuffer2 ld hl, sSpriteBuffer1 call AlignSpriteDataCentered ; copy and align buffer 2 to 1 (containing the LSB of the 2bpp sprite) - call PrepareRTCDataAndDisableSRAM + call CloseSRAM pop de jp InterlaceMergeSpriteBuffers @@ -148,7 +148,7 @@ ZeroSpriteBuffer:: ; de: output address InterlaceMergeSpriteBuffers:: ld a, $0 - call SwitchSRAMBankAndLatchClockData + call OpenSRAM push de ld hl, sSpriteBuffer2 + (SPRITEBUFFERSIZE - 1) ; destination: end of buffer 2 ld de, sSpriteBuffer1 + (SPRITEBUFFERSIZE - 1) ; source 2: end of buffer 1 @@ -191,4 +191,4 @@ InterlaceMergeSpriteBuffers:: ldh a, [hLoadedROMBank] ld b, a call CopyVideoData - jp PrepareRTCDataAndDisableSRAM + jp CloseSRAM diff --git a/home/uncompress.asm b/home/uncompress.asm index 27474f2d..87264888 100644 --- a/home/uncompress.asm +++ b/home/uncompress.asm @@ -7,9 +7,9 @@ UncompressSpriteData:: ld a, b call BankswitchCommon ld a, $0 - call SwitchSRAMBankAndLatchClockData + call OpenSRAM call _UncompressSpriteData - call PrepareRTCDataAndDisableSRAM + call CloseSRAM pop af call BankswitchCommon ret |