aboutsummaryrefslogtreecommitdiffstats
path: root/home/pics.asm
diff options
context:
space:
mode:
authorSatoMew <SatoMew@users.noreply.github.com>2024-06-27 02:19:06 +0000
committerGitHub <noreply@github.com>2024-06-26 21:19:06 -0500
commit57bec62508c6ae3424977c9db55ad66fc1eb0a42 (patch)
treee7b3b81c68c901a6b2b1811c8a6e1c57b479dd44 /home/pics.asm
parentMerge branch 'master' of https://github.com/pret/pokered (diff)
downloadpokeyellow-57bec62508c6ae3424977c9db55ad66fc1eb0a42.tar.gz
pokeyellow-57bec62508c6ae3424977c9db55ad66fc1eb0a42.tar.xz
pokeyellow-57bec62508c6ae3424977c9db55ad66fc1eb0a42.zip
Improve documentation of some SRAM routines (#114)
Diffstat (limited to 'home/pics.asm')
-rw-r--r--home/pics.asm8
1 files changed, 4 insertions, 4 deletions
diff --git a/home/pics.asm b/home/pics.asm
index c0559908..d02cf1b5 100644
--- a/home/pics.asm
+++ b/home/pics.asm
@@ -89,7 +89,7 @@ LoadUncompressedSpriteData::
add a ; 8*(7*((8-w)/2) + 7-h) ; combined overall offset (in bytes)
ldh [hSpriteOffset], a
ld a, $0
- call SwitchSRAMBankAndLatchClockData
+ call OpenSRAM
ld hl, sSpriteBuffer0
call ZeroSpriteBuffer ; zero buffer 0
ld de, sSpriteBuffer1
@@ -100,7 +100,7 @@ LoadUncompressedSpriteData::
ld de, sSpriteBuffer2
ld hl, sSpriteBuffer1
call AlignSpriteDataCentered ; copy and align buffer 2 to 1 (containing the LSB of the 2bpp sprite)
- call PrepareRTCDataAndDisableSRAM
+ call CloseSRAM
pop de
jp InterlaceMergeSpriteBuffers
@@ -148,7 +148,7 @@ ZeroSpriteBuffer::
; de: output address
InterlaceMergeSpriteBuffers::
ld a, $0
- call SwitchSRAMBankAndLatchClockData
+ call OpenSRAM
push de
ld hl, sSpriteBuffer2 + (SPRITEBUFFERSIZE - 1) ; destination: end of buffer 2
ld de, sSpriteBuffer1 + (SPRITEBUFFERSIZE - 1) ; source 2: end of buffer 1
@@ -191,4 +191,4 @@ InterlaceMergeSpriteBuffers::
ldh a, [hLoadedROMBank]
ld b, a
call CopyVideoData
- jp PrepareRTCDataAndDisableSRAM
+ jp CloseSRAM